Integrated circuits include millions of metal oxide semiconductor field effect transistors (“MOSFET”). Such transistors may include p-channel MOS transistors, and n-channel MOS transistors, depending on their dopant conductivity type. The steady downscaling of MOS transistor dimensions has been the main stimulus to the growth of microelectronics and the computer industry over the past two decades. The major limiting factors for MOSFET scaling are the short-channel effects, for example, threshold voltage roll-off at decreasing channel length and Drain Induced Barrier Lowering (“DIBL”). Short-channel effects due to the decreased length of the transistor channel between source and drain regions can severely degrade the performance of the semiconductor transistor. Because of short-channel effects, the electrical characteristics of the transistor, for example, threshold voltage, subthreshold currents, and current-voltage characteristics beyond threshold become difficult to control with bias on the gate electrode.
FIG. 1 illustrates a cross-sectional view of a conventional prior art planar MOSFET structure 100. The silicon layer 102 is epitaxially grown on a monocrystalline silicon substrate 101. Field isolation regions 103 to isolate adjacent integrated circuit devices are formed in the silicon layer 102. Gate dielectric 104 and gate electrode 105 are subsequently deposited on the silicon layer 102. Ions are implanted into the layer of silicon forming source extension region 106 and drain extension region 107 on opposing sides of the gate electrode 105. The source extension 106 and the drain extension 107 are shallow junctions to minimize short-channel effects in the MOSFET structure 100 having submicron or nanometer dimensions. Spacers 108 are deposited on the opposing sides of the gate electrode 105 and the gate dielectric 104. The spacers 108 cover sides of the gate electrode 105 and the gate dielectric 104, and also cover portions of the top surface of the silicon layer 102 adjacent and on opposing sides of the gate electrode 105. If spacers 108 include silicon nitride (“Si3N4”), spacer liner oxide 109 is deposited as a buffer layer between the spacers 108 and the opposing sides of the gate electrode 105 and the gate dielectric 104. A source contact junction 110 with a source contact 111 and a drain contact junction 112 with a drain contact 113 are formed in the silicon layer 102 at the opposing sides of the gate electrode 105. The source contact junction 110 and the drain contact junction 112 are fabricated as deep junctions such that a relatively large size of the source contact 111 and the drain contact 113 respectively may be fabricated therein to provide low resistance contact to the drain and the source respectively of the MOSFET structure 100. For polysilicon gate electrode, a gate silicide 114 is formed on the gate electrode 105 to provide contact to the gate of the MOSFET structure 100.
FIG. 2 is a perspective view of a Tri-gate transistor structure 200, which provides improved control over the electrical characteristics of the transistor. The Tri-gate transistor structure 200 has a source region 201 and a drain region 202 formed in the fin body 203 at opposite sides of the gate electrode 204. The fin body 203 is formed on a top surface of the insulating layer 206 on a silicon substrate 207. The gate electrode 204 with underlying gate dielectric 205 covers a top 208 and two opposing sidewalls 209 of a portion of the fin body 203. The Tri-gate transistor structure 200 provides conductive channels along the top 208 and the two opposing sidewalls 209 of the portion of the fin body 203. This effectively triples the space available for electrical signals to travel that gives the Tri-gate transistor substantially higher performance than the conventional planar transistors without using more power. The corners 211 of the gate electrode 204 having gates on two adjacent sides of the fin body 203 increase control over the electrical characteristics of the transistor. At low gate voltages the performance of corner portion of the Tri-gate transistor dominates in the current-voltage (“Id-Vg”) characteristics. Above threshold voltage, however, the non-corner portion of the Tri-gate body turns on and dominates in the operation of the transistor. The non-corner portions of the Tri-gate body, however, has substantially less control over the short-channel effects than the corner portions of the Tri-gate body that degrades performance of the Tri-gate transistor.